The present invention relates generally to bus protocols and more specifically to a method for robust broadcasting on a Peripheral Component Interconnect(PCI) bus or the like.
Data broadcasting mechanisms are a proven and effective way to distribute data within high performance computing environments. The Peripheral Component Interconnect(PCI) bus is such an environment. PCI has become an industry standard low cost high performance bus architecture and is used in numerous computing environments.
A deficiency of the current PCI specification (Revision 2.1) is that it lacks a "robust" data broadcasting methodology. Generally, a robust data broadcasting methodology includes attributes such as explicit identification (e.g. addressing) of data packets, and high speed delivery of data packets with minimal delays and inefficiencies.
The PCI specification does implement a "simple" message broadcast mechanism via the Special Cycle transaction. The Special Cycle transaction can be used to communicate processor status or in general any logical sideband signaling required between PCI agents. PCI sideband signaling is defined as communication that occurs between two or more PCI agents that occurs outside the normal transfers supported by the PCI specification and only has meaning between those agents.
The Special Cycle transaction allows the PCI system designer a method of achieving sideband(even limited broadcast) communication without requiring additional signal pins. However, the Special Cycle transaction has several limitations. Some of the limitations are:
No explicit destination address(i.e. the address phase contains no valid information) PA1 The first data phase is required to be a 16 bit encoded message field and an optional 16 bit data field(i.e. useless fields) PA1 Only three message encodings are defined in the PCI specification, all other messages encodings are reserved. Additional message encodings must be obtained from the PCI Special Interest Group(SIG) Steering Committee. PA1 The Special Cycle transaction is required to be "slow" to allow target agents sufficient time to process the broadcasted request. The master agent is required to guarantee that the current access will not complete for at least four clocks after the last valid data phase. PA1 The standard mapping of the PCI bus' three physical address spaces(Memory, I/O, and Configuration) are available unaltered. PA1 In addition, some of the above unused PCI physical address space is allocated to master(s) and target(s) as the "master-self-responds-as-target, agents-set-to-snoop" physical address space to support the robust data broadcasting transaction of the invention.
As can be seen, the currently defined "simple" (i.e. Special Cycle) broadcast mechanism as defined per the PCI specification is not adequate to support the desired attributes for robust data broadcasting.
Computer systems requiring high speed data delivery would benefit by a method to allow a robust broadcast mechanism on a PCI bus without the need for additional sideband signaling pins.